8May
how to transfer Plain Text and Key and Cipher Text in AES 128 [closed]
I'm currently using kintex 7 xc7k325tfbg900-2 FPGA board and Vivado to build an encryption system using AES 128. I'm done with the top module for the encryption process. I let Vivado make the schematic wrapper and I want to make the constraints file for the clk and rst and also I don't want to make the plain text, key, and cipher text as i/o. I want them to be generated and sent to FPGA then the result is sent back for me to see.
I've searched for a while and some people said that I should make a module for UART and a program using C++ or other languages to be able to do as I said but I don't understand it so can you help me, please?
